1 |
A self-biased transconductor with widely input linear range for Gm-C filters
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INTERNATIONAL JOURNAL OF ELECTRONICS
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2 |
Design of a 10-Bit High Performance Current-Steering DAC with a Novel Nested Decoder Based on Domino Logic
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JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS
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3 |
An 8-Bit Unified Segmented Current-Steering Digital-to-Analog Converter
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ARABIAN JOURNAL FOR SCIENCE AND ENGINEERING
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4 |
A charge sharing–based switching scheme for SAR ADCs
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INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS
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5 |
An energy-efficient DAC switching algorithm based on charge recycling method for SAR ADCs
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MICROELECTRONICS JOURNAL
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6 |
Input Offset Estimation of CMOS Integrated Circuits in Weak Inversion
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IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
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7 |
A Class-AB Bulk-Driven Amplifier with Enhanced Transconductance Using Quasi-Floating Gate Method
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JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS
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8 |
Design and Analysis of an Ultra-Low-Power Second-Order Asynchronous Delta–Sigma Modulator
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CIRCUITS SYSTEMS AND SIGNAL PROCESSING
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9 |
A super class-AB adaptive biasing amplifier in 65-nm CMOS technology
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INTERNATIONAL JOURNAL OF ELECTRONICS
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10 |
An efficient approach to enhance bulk-driven amplifiers
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ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
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11 |
A 63-dB gain OTA operating in subthreshold with 20-nW power consumption
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INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS
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12 |
Multi-Path Class AB Operational Amplifier with High Performance for SC Circuits
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JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS
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13 |
Slew rate boosting technique for an upgraded transconductance amplifier
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ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
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14 |
A 0.6-V, 0.4-µW bulk-driven operational amplifier with rail-to-rail input/output swing
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ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
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15 |
Systematic design of analog integrated circuits using ant colony algorithm based on noise optimization
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ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
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16 |
Improving power efficiency of a two-stage operational amplifier for biomedical applications
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ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
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17 |
Design and analysis of folded cascode OTAs using Gm/Id methodology based on flicker noise reduction
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ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
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18 |
High Gain and High CMRR Two-Stage Folded Cascode OTA with Nested Miller Compensation
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JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS
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19 |
Enhancing transconductance of ultra‐low‐power two‐stage folded cascode OTA
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ELECTRONICS LETTERS
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