In this paper, an 8-bit segmented current-steering digital-to-analog converter (DAC) is presented where the digital and analog parts are unified using current mode binary to thermometer decoder, resulting in a smaller chip area and simple layout scheme. In addition, the latch and driver circuits which are the main blocks of conventional current-steering DACs are eliminated in this design. Thus, the number of transistors in the digital part of DAC is reduced and higher sampling rate is obtained. Furthermore, the proposed current mode decoder has lower output voltage variation and consequently lower dynamic power dissipation. Finally, the proposed DAC is simulated in 0.18 μm CMOS technology with the 1.8 V supply voltage. The post-layout simulation results show that differential nonlinearity and integral nonlinearity errors are 0.034 and 0.024 LSB, respectively. In addition, the spurious-free dynamic range is 51 dB over 94 MHz output bandwidth at 500 MS/s. Moreover, the total power dissipation of the designed DAC is only 5.7 mW and the active area is small equal to 0.02 mm2.
