In this paper, a useful procedure to design folded cascode (FC) and recycling folded cascode (RFC) OTAs is presented. The proposed procedure is based on a simplified equation of input voltage noise in strong and weak inversion regions. The presented method considerably decreases the input referred noise of amplifiers in weak, moderate and strong inversion. The proposed amplifiers were simulated in 0.18μm CMOS technology, achieving 36% and 25% reduction of input voltage noise @ 1Hz in strong and weak inversion, respectively, compared to the conventional FC, without increasing power consumption and silicon area.
