FPGA interconnection network is tested primarily using application-dependent testing, which tests only the resources used in a particular application instead of testing all FPGA resources. The majority of state-of-the-art application-dependent methods, involve reprogramming user-specified LUTs into single-term functions for testing stuck-at and bridging faults while interconnect configurations remain unchanged. In this paper, a novel approach for offline and online application-dependent testing of FPGA interconnects is presented. In this approach, test vectors are applied directly to user-specified designs to test FPGA interconnects without reconfiguring LUTs into other functions. As a result, it is possible to test an FPGA simultaneously in its normal mode of operation. However, 100% fault coverage cannot be achieved in online mode of test due to the presence of LUTs with uncontrollable inputs. According to simulation results, 100% fault coverage is achieved for almost all benchmark circuits for the offline mode of test.
