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Hadi Jahanirad

Hadi Jahanirad

Academic rank: Associate Professor
ORCID:
Education: PhD.
ScopusId: 35731327400
HIndex:
Faculty: Faculty of Engineering
Address: Iran, Kurdistan, Sanandaj, Pasdaran street, University of Kurdistan, Department of Electrical Engineering
Phone:

Research

Title
A Concurrent BIST Architecture for Combinational Logic Circuits
Type
Presentation
Keywords
BIST; Concurrent self test; Fault simulation; Test generation
Year
2020
Researchers Ahmad Menbari ، Hadi Jahanirad

Abstract

A built-in self-test is the capability of hardware/software to test by itself. BIST techniques are divided into two main groups: offline and online. In this paper, a new concurrent BIST technique based on duplication design is presented. The proposed method uses a pre-computed test set, which is selected by a novel methodology instead of using a deterministic test pattern generation (TPG) algorithm. In the proposed method, two Linear Feedback Shift Registers (LFSR) are used to detect the required test patterns instead of a high complex and power hungry conventional pattern detector. As the main result, the area overhead is decreased 43.9% in comparison with the previous methods. In comparison with duplication design, a reduced version of CUT is used as golden circuit in our method. Clearly, some of the single stuck-at faults are not covered in the proposed design